PWRDWN=Val_0x0, RWKPFE=Val_0x0, RWKFILTRST=Val_0x0, RWKPRCVD=Val_0x0, RWKPKTEN=Val_0x0, GLBLUCAST=Val_0x0, MGKPKTEN=Val_0x0, MGKPRCVD=Val_0x0
PMT Control and Status Register
| PWRDWN | Power Down When this bit is set, the MAC receiver drops all received packets until it receives the expected magic packet or remote wake-up packet. This bit is then self-cleared and the power-down mode is disabled. The software can clear this bit before the expected magic packet or remote wake-up packet is received. The packets received by the MAC after this bit is cleared are forwarded to the application. This bit must only be set when the MGKPKTEN, GLBLUCAST, or RWKPKTEN bit is set high. Note: The user can gate-off the CLK_CSR during power-down mode. However, when the CLK_CSR is gated-off, the user cannot perform any read or write operations on this register. Therefore, software cannot clear this bit. Access restriction applies. Setting 1 sets. Self-cleared. Setting 0 has no effect. 0 (Val_0x0): Power down is disabled 1 (Val_0x1): Power down is enabled |
| MGKPKTEN | Magic Packet Enable When this bit is set, a power management event is generated when the MAC receives a magic packet. 0 (Val_0x0): Magic packet is disabled 1 (Val_0x1): Magic packet is enabled |
| RWKPKTEN | Remote Wake-Up Packet Enable When this bit is set, a power management event is generated when the MAC receives a remote wake-up packet. 0 (Val_0x0): Remote wake-up packet is disabled 1 (Val_0x1): Remote wake-up packet is enabled |
| MGKPRCVD | Magic Packet Received When this bit is set, it indicates that the power management event is generated because of the reception of a magic packet. This bit is cleared when this register is read. Access restriction applies. Clears on read or write of 1 when the ETH_MAC_CSR_SW_CTRL[RCWE] bit is set. Self-set to 1 on internal event. 0 (Val_0x0): No magic packet is received 1 (Val_0x1): Magic packet is received |
| RWKPRCVD | Remote Wake-Up Packet Received When this bit is set, it indicates that the power management event is generated because of the reception of a remote wake-up packet. This bit is cleared when this register is read. Access restriction applies. Clears on read or write of 1 when the ETH_MAC_CSR_SW_CTRL[RCWE] bit is set. Self-set to 1 on internal event. 0 (Val_0x0): Remote wake-up packet is received 1 (Val_0x1): Remote wake-up packet is received |
| GLBLUCAST | Global Unicast When this bit set, any unicast packet filtered by the MAC (DAF) address recognition is detected as a remote wake-up packet. 0 (Val_0x0): Global unicast is disabled 1 (Val_0x1): Global unicast is enabled |
| RWKPFE | Remote Wake-up Packet Forwarding Enable When this bit is set along with RWKPKTEN, the MAC receiver drops all received frames until it receives the expected wake-up frame. All frames after that event including the received wake-up frame are forwarded to application. This bit is then self-cleared on receiving the wake-up packet. The application can also clear this bit before the expected wake-up frame is received. In such cases, the MAC reverts to the default behavior where packets received are forwarded to the application. This bit must only be set when RWKPKTEN is set high and PWRDWN is set low. The setting of this bit has no effect when PWRDWN is set high. Note: If Magic Packet Enable and Wake-Up Frame Enable are both set along with setting of this bit and Magic Packet is received prior to wake-up frame, this bit is self-cleared on receiving Magic Packet, the received Magic packet is dropped, and all frames after received Magic Packet are forwarded to application. Access restriction applies. Setting 1 sets. Self-cleared. Setting 0 has no effect. 0 (Val_0x0): Remote wake-up packet forwarding is disabled 1 (Val_0x1): Remote wake-up packet forwarding is enabled |
| RWKPTR | Remote Wake-up FIFO Pointer This field gives the current value of the Remote Wake-up Packet Filter register pointer. |
| RWKFILTRST | Remote Wake-Up Packet Filter Register Pointer Reset When this bit is set, the remote wake-up packet filter register pointer is reset to 0x0. It is automatically cleared after 1 clock cycle. Access restriction applies. Setting 1 sets. Self-cleared. Setting 0 has no effect. 0 (Val_0x0): Remote wake-up packet filter register pointer is not reset 1 (Val_0x1): Remote wake-up packet filter register pointer is reset |